Digital Logic and Combinational Design
Curriculum and historical examination lineage for Digital Logic and Combinational Design under Unit 2 (Electronics) of Electrical and Electronics Engineering (21EEB101J) at SRMIST.
Historical appearance distribution across SRMIST Formative Tests (CT1, CT2) and University End Semester examinations.
Factual marks weightage of questions asked on this topic in historical examinations.
Question templates that recur across multiple examination cycles with similar conceptual stems.
“Write the truth tables for the following logic gates with neat sketches (i) NAND gate (ii) NOR gate...”
“The logical expression Y=AB+AC is known as (A) Standard sum of product form (B) Sum of product form...”
“A product term containing all the inputs of the functions in either complemented or uncomplemented...”
“Differentiate minterm and maxterm.”
Representative historical questions extracted directly from SRMIST examination papers.
Write the truth tables for the following logic gates with neat sketches (i) NAND gate (ii) NOR gate (iii) XOR gate (iv) X-NOR gate
The logical expression Y=AB+AC is known as (A) Standard sum of product form (B) Sum of product form (C) Standard product of sum form (D) Product of sum form
A product term containing all the inputs of the functions in either complemented or uncomplemented form is called a) MAXTERM b) SOP c) MINTERM d) POS
Differentiate minterm and maxterm.
Examinations where questions for Digital Logic and Combinational Design have appeared.
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